In assembling components for electronic devices, integrated circuit chips are mounted on multi-layer boards and cards which are then incorporated into a final product. It is known in the art to attach an integrated circuit chip to a chip carrier, often made of ceramic, which is then mounted on and secured to a multi-layer circuit board or card. Usually, the chip is soldered to the chip carrier using various known methods such as wave soldering. The chip carrier usually includes pins extending from the surface that is opposite the side where the chip is attached. These pins extend into holes formed in the circuit board or card.
The method used to attach a chip or chip carrier to the circuit board or card must ensure electrical continuity between the chip, the chip carrier, the hole in the circuit board or card into which the chip carrier pins are inserted and any electrically conductive layers of the board or card continuous with the material lining the hole. In making such an assembly, the chip carrier may be made detachable by mounting the chip carrier pins in spring clips, such as bifurcated spring connectors, which are then inserted into the holes of the circuit board or card and may be soldered or otherwise secured thereto.
Increasingly, more and more devices are incorporated on a single chip, increasing the number of input and output channels (I/O's) associated with a chip. Presently, thousands of devices have been incorporated in a single chip. As the number of I/O's increases, the number of connections between the integrated circuit and the circuit board or card and the number of holes which must be formed in the circuit board or card increases. To reduce the amount of material which must be taken away from the board or card to form a hole and to greatly and readily increase the I/O density, it became increasingly desirable to use direct chip attached methods to mount a chip directly on a printed circuit board or card.
With direct chip attachment methods, a chip is directly mounted on a circuit board using solder balls to connect the chip I/O's to the holes in the multi-layer board or card. Such balls have a much smaller diameter than the pins associated with the chip carriers allowing the removal of less material from the board or card and the closer spacing of the holes. Direct chip attachment methods usually involve placing a solder ball directly over the holes in the board or card, then placing the board or chip on top of the balls so that the location of the balls corresponds to I/O's on the chip and finally soldering the assembly together.
Such multi-layer printed circuit boards and cards used in the above applications usually include a plurality of power and signal layers separated by insulating layers, the power, signal, insulating layers being laminated together in one structure making the board or card. The holes in the board or card for attaching chips or chip carriers are often drilled either mechanically or with a laser through the laminated layers of the board or card. As the number of I/O's associated with a chip increases, the density of the holes needed in the printed circuit board or card increases. As the number of I/O's increases and direct chip methods are used, the space in between the through holes is reduced, making it increasingly difficult to form such holes through layers of the board or card.
As a means of avoiding the problems associated with a high density of holes in the board or card, multi-layer printed circuit boards or cards have been fabricated using "cores". In the "core" method of forming a multi-layer circuit board or card, a plurality of cores are first fabricated. Each core includes a power plane, upper and lower signal layers, and plated through holes extending through the thickness of the core. A circuit board or card is formed by joining two or more of the cores together.
Such cores, known as circuitized power cores (CPC's), permit the packaging of high I/O chips with the associated high wiring and via densities. When joining CPC's to form a multi-layer printed circuit board or card it is essential that the electrical connections be properly achieved between the vertically aligned plated through holes and adjacent cores. This has previously been done by applying an upper and lower "cap" to each core.
The caps consist of a layer of an electrically conductive material. This electrically conductive layer is then joined to a layer of electrically insulating material. Each cap also includes via holes extending completely through the thickness of the insulating layer. These via holes are formed in the insulating layer at points corresponding to the plated through holes in the CPC's so that when the cap is placed adjacent to the core, the vias and the plated through holes will be aligned. After the formation of the vias in the electrically insulting layer of the cap, electrically conductive material is deposited into each via hole using conventional electroplating techniques.
To join two cores together, an upper and a lower cap is first joined to each CPC using heat and pressure. The electrically conductive layer of each cap is then etched away, exposing the electrically insulating layers and the filled vias. The resulting CPC's are then properly aligned with the vias in electrical contact and laminated together using heat and pressure. The heat and pressure cause the electrically conductive material in the via holes to flow, becoming joined to the material adjacent via on the other core, thereby providing electrical connection through the aligned plated through holes in the cores.
The above described method for joining CPC's has a number of disadvantages. These disadvantages include the need to completely etch away the electrically conductive layer of each cap, wasting time, money, and material. In addition, often, the electrically conductive material deposited in these vias does not completely fill the aligned plated through holes and adjacent cores, causing electrical discontinuity between the through holes. Using the cap method of joining the CPC's, there is no assurance that electrical continuity will be achieved in all of the through holes. Further, in a relatively thick board or card, with a large number of layers, difficulties might arise in detecting the exact location of an electrical discontinuity. Such discontinuity might also necessitate the reworking of the board or card, consuming additional time and materials.